Semiconductor Engineering

Creating An Accurate FEOL CMP Model

For decades, semiconductor manufacturers have used chemical-mechanical polishing (CMP) as the primary technique for the smoothing and leveling (planarization) of dielectrics and metal layers. CMP ...
Semiconductor Engineering

Reducing Rework In CMP: An Enhanced Machine Learning-Based Hybrid Metrology Approach

The semiconductor industry is constantly marching toward thinner films and complex geometries with smaller dimensions, as well as newer materials. The number of chemical mechanical planarization (CMP) ...
EDN

Applied drives CMP process control down to 45 nm and smaller

To allow real-time control of dielectric chemical mechanical planarization (CMP) processes to the 45 nm device node and beyond, Santa Clara, Calif.-based semiconductor manufacturing equipment leader ...
Portland Press Herald

CMP executive: Electric utility is committed to a transparent auditing process

Though a recent editorial said otherwise, the truth is that all three independent analyses of CMP's billing system were thorough and meticulous. An error has occurred ...