New SSN Analyzer Tool—Provides designer feedback on potential simultaneous switching noise (SSN) violations during pin assignments, enabling faster board design and improving signal integrity.
Altera has announced the release of the latest version of its Quartus II development software for CPLD, FPGA and HardCopy Asic designs. Version 10.0 of the software includes support for Altera’s 28-nm ...
“For the past six months early access customers have successfully used Quartus II software to design Arria 10 FPGAs and SoCs, and today we are pleased to make this software support available to all ...
San Jose, Calif., -- May 11, 2015 – Altera Corporation (Nasdaq: ALTR) unveiled its Spectra-Q™ engine, a new technology at the heart of the company’s proven Quartus® II software, to improve design ...