Hackaday

Did You Know YoSys Knows VHDL Too?

We’ve been fans of the Yosys / Nextpnr open-source FPGA toolchain for a long while now, and like [Michael] we had no idea that their oss-cad-suite installer sets up everything so that you can write in ...
EDN

VHDL 101 – Hierarchy in VHDL Code

All designs need structure to make them easy to develop and maintain. We all use abstraction in our designs regardless of if it being electronics, software, or mechanical. In this article we will look ...
Hackaday

FPGA Used VHDL For Fractals

Over on GitHub, [ttsiodras] wanted to learn VHDL. So he started with an algorithm to do Mandelbrot sets and moved it to an FPGA. Because of the speed, he was able to accomplish real-time zooming. You ...
EDN

FPGA design tool bypasses VHDL coding

CoDeveloper, a C language design tool for Altera Nios-based and Xilinx MicroBlaze-based programmable platforms, allows creation of a complete hardware/software application with no need to write VHDL ...
mccormick.northwestern.edu

COMP_ENG 355: ASIC and FPGA Design

This course will introduce students to practical design methodologies for developing applications for FPGAs and ASICs. You will learn the fundamentals for FPGA and ASIC design through software coding ...
Electronic Design

VHDL Code Offloads LED Blinking Task To A CPLD

An earlier Idea For Design (Hardware-Based LED Blinking Control Eliminates Software Overhead) described a very interesting way to offload the software overhead required for a microcontroller to drive ...
Semiconductor Engineering

Customizing A LLM Model For VHDL Design of High-Performance MPUs (IBM)

A new technical paper titled “Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors” was published by researchers at IBM. “The use of Large Language Models (LLMs) in ...
Semiconductor Engineering

Customizing An LLM Tailored Specifically For VHDL Code And Design Of High Performance Processors (IBM)

A new technical paper titled “Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors” was published by researchers at IBM. “The use of Large Language Models (LLMs) in ...
Design-Reuse

Open-source Framework and Practical Considerations for Translating RTL VHDL to SystemC

SystemC has gained wide acceptance in the design of new digital IPs. However, there are numerous IPs already designed in VHDL. With the advances in SystemC ecosystem, like IEEE standardization, TLM-2 ...
TechRepublic

Design and Simulation of 8255 Programmable Peripheral Interface Adapter Using VHDL

The 8255A Programmable Peripheral Interface (PPI) implements a general-purpose I/O interface to connect peripheral equipment to a microcomputer system bus. The core’s functional configuration is ...